Fast Evolution of Large Digital Circuits

Evolvable hardware (EHW) refers to self-reconfiguration hardware design, where the configuration is under the control of an evolution algorithm. One of the main difficulties in using EHW to solve real-world problems is scalability, which limits the size of the circuit that may be evolved. This paper outlines evolvable hardware based on a 2-LUT (2-input lookup table) array, which allows the evolution of large circuits via decomposition. The proposed EHW has been tested with multipliers and logic circuits taken from the Microelectronics Centre of North Carolina (MCNC) benchmark library. The experimental results demonstrate that the proposed scheme improves the evolution of logic circuits in terms of the number of generations, area and delay, reduces computational time and enables the evolution of large circuits. The proposed EHW automatically generates a complete circuit netlist in a SDRAM. Because of the low cost and large data storage of a SDRAM, the evolvable hardware provides a good platform to evolve large circuits. Key-words: Evolvable hardware, Evolutionary computation, Adaptive systems, Digital circuits, Problem decomposition, Circuit design